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  1. Abedini A, Bakar AA, Larki F, Menon PS, Islam MS, Shaari S
    Nanoscale Res Lett, 2016 Dec;11(1):287.
    PMID: 27283051 DOI: 10.1186/s11671-016-1500-z
    This paper focuses on the recent advances on radiolysis-assisted shape-controlled synthesis of noble metal nanostructures. The techniques and protocols for producing desirable shapes of noble metal nanoparticles are discussed through introducing the critical parameters which can influence the nucleation and growth mechanisms. Nucleation rate plays a vital role on the crystallinity of seeds while growth rate of different seeds' facets determines the final shape of resultant nanoparticles. Nucleation and growth rate both can be altered with factors such as absorbed dose, capping agents, and experimental environment condition to control the final shape. Remarkable physical and chemical properties of synthesized noble metal nanoparticles by controlled morphology have been systematically evaluated to fully explore their applications.
  2. Larki F, Dehzangi A, Md Ali SH, Jalar A, Islam MS, Hamidon MN, et al.
    PLoS One, 2014;9(4):e95182.
    PMID: 24743692 DOI: 10.1371/journal.pone.0095182
    This paper examines the impact of two important geometrical parameters, namely the thickness and source/drain extensions on the performance of low doped p-type double lateral gate junctionless transistors (DGJLTs). The three dimensional Technology Computer-Aided Design simulation is implemented to calculate the characteristics of the devices with different thickness and source/drain extension and based on that, the parameters such as threshold voltage, transconductance and resistance in saturation region are analyzed. In addition, simulation results provide a physical explanation for the variation of device characteristics given by the variation of geometric parameters, mainly based on investigation of the electric field components and the carries density variation. It is shown that, the variation of the carrier density is the main factor which affects the characteristics of the device when the device's thickness is varied. However, the electric field is mainly responsible for variation of the characteristics when the source/drain extension is changed.
  3. Abedini A, Saion E, Larki F, Zakaria A, Noroozi M, Soltani N
    Int J Mol Sci, 2012;13(9):11941-53.
    PMID: 23109893 DOI: 10.3390/ijms130911941
    Colloidal Cu@CuAlO(2)-Al(2)O(3) bimetallic nanoparticles were prepared by a gamma irradiation method in an aqueous system in the presence of polyvinyl pyrrolidone (PVP) and isopropanol respectively as a colloidal stabilizer and scavenger of hydrogen and hydroxyl radicals. The gamma irradiation was carried out in a (60)Co gamma source chamber with different doses up to 120 kGy. The formation of Cu@CuAlO(2)-Al(2)O(3) nanoparticles was observed initially by the change in color of the colloidal samples from colorless to brown. Fourier transform infrared spectroscopy (FTIR) confirmed the presence of bonds between polymer chains and the metal surface at all radiation doses. Results of transmission electron microscopy (TEM), energy dispersive X-ray spectrometry (EDX), and X-ray diffraction (XRD) showed that Cu@CuAlO(2)-Al(2)O(3) nanoparticles are in a core-shell structure. By controlling the absorbed dose and precursor concentration, nanoclusters with different particle sizes were obtained. The average particle diameter increased with increased precursor concentration and decreased with increased dose. This is due to the competition between nucleation, growth, and aggregation processes in the formation of nanoclusters during irradiation.
  4. Dehzangi A, Abdullah AM, Larki F, Hutagalung SD, Saion EB, Hamidon MN, et al.
    Nanoscale Res Lett, 2012;7(1):381.
    PMID: 22781031 DOI: 10.1186/1556-276X-7-381
    The junctionless nanowire transistor is a promising alternative for a new generation of nanotransistors. In this letter the atomic force microscopy nanolithography with two wet etching processes was implemented to fabricate simple structures as double gate and single gate junctionless silicon nanowire transistor on low doped p-type silicon-on-insulator wafer. The etching process was developed and optimized in the present work compared to our previous works. The output, transfer characteristics and drain conductance of both structures were compared. The trend for both devices found to be the same but differences in subthreshold swing, 'on/off' ratio, and threshold voltage were observed. The devices are 'on' state when performing as the pinch off devices. The positive gate voltage shows pinch off effect, while the negative gate voltage was unable to make a significant effect on drain current. The charge transmission in devices is also investigated in simple model according to a junctionless transistor principal.
  5. Larki F, Dehzangi A, Abedini A, Abdullah AM, Saion E, Hutagalung SD, et al.
    Beilstein J Nanotechnol, 2012;3:817-23.
    PMID: 23365794 DOI: 10.3762/bjnano.3.91
    A double-lateral-gate p-type junctionless transistor is fabricated on a low-doped (10(15)) silicon-on-insulator wafer by a lithography technique based on scanning probe microscopy and two steps of wet chemical etching. The experimental transfer characteristics are obtained and compared with the numerical characteristics of the device. The simulation results are used to investigate the pinch-off mechanism, from the flat band to the off state. The study is based on the variation of the carrier density and the electric-field components. The device is a pinch-off transistor, which is normally in the on state and is driven into the off state by the application of a positive gate voltage. We demonstrate that the depletion starts from the bottom corner of the channel facing the gates and expands toward the center and top of the channel. Redistribution of the carriers due to the electric field emanating from the gates creates an electric field perpendicular to the current, toward the bottom of the channel, which provides the electrostatic squeezing of the current.
  6. Buyong MR, Larki F, Faiz MS, Hamzah AA, Yunas J, Majlis BY
    Sensors (Basel), 2015;15(5):10973-90.
    PMID: 25970255 DOI: 10.3390/s150510973
    In this work, the dielectrophoretic force (F(DEP)) response of Aluminium Microelectrode Arrays with tapered profile is investigated through experimental measurements and numerical simulations. A standard CMOS processing technique with a step for the formation of a tapered profile resist is implemented in the fabrication of Tapered Aluminium Microelectrode Arrays (TAMA). The F(DEP) is investigated through analysis of the Clausius-Mossotti factor (CMF) and cross-over frequency (f(xo)). The performance of TAMA with various side wall angles is compared to that of microelectrodes with a straight cut sidewall profile over a wide range of frequencies through FEM numerical simulations. Additionally, electric field measurement (EFM) is performed through scanning probe microscopy (SPM) in order to obtain the region of force focus in both platforms. Results showed that the tapered profile microelectrodes with angles between 60° and 70° produce the highest electric field gradient on the particles. Also, the region of the strongest electric field in TAMA is located at the bottom and top edge of microelectrode while the strongest electric field in microelectrodes with straight cut profile is found at the top corner of the microelectrode. The latter property of microelectrodes improves the probability of capturing/repelling the particles at the microelectrode's side wall.
  7. Dehzangi A, Larki F, Hutagalung SD, Goodarz Naseri M, Majlis BY, Navasery M, et al.
    PLoS One, 2013;8(6):e65409.
    PMID: 23776479 DOI: 10.1371/journal.pone.0065409
    In this letter, we investigate the fabrication of Silicon nanostructure patterned on lightly doped (10(15) cm(-3)) p-type silicon-on-insulator by atomic force microscope nanolithography technique. The local anodic oxidation followed by two wet etching steps, potassium hydroxide etching for silicon removal and hydrofluoric etching for oxide removal, are implemented to reach the structures. The impact of contributing parameters in oxidation such as tip materials, applying voltage on the tip, relative humidity and exposure time are studied. The effect of the etchant concentration (10% to 30% wt) of potassium hydroxide and its mixture with isopropyl alcohol (10%vol. IPA ) at different temperatures on silicon surface are expressed. For different KOH concentrations, the effect of etching with the IPA admixture and the effect of the immersing time in the etching process on the structure are investigated. The etching processes are accurately optimized by 30%wt. KOH +10%vol. IPA in appropriate time, temperature, and humidity.
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